1. Field of the Invention
The present invention relates to charged-particle beam processing. In particular, the present invention relates to methods of determining the site of a selected feature of a sample.
2. The Prior Art
Focused ion beam (FIB) systems are used in a variety of ways to aid in diagnosis and repair of semiconductor integrated circuit (IC) devices. Such systems are used, for example, to mill away material overlying a conductor to expose the conductor, to sever the conductor, or to deposit conductive material to electrically interconnect conductors. When the conductor is hidden by overlying layers, it must be located so the FIB can be accurately positioned for milling.
Contrast images can be prepared by scanning an electron beam or ion beam over the surface of the device and detecting secondary charged particles. The detector signal is typically used to produce an image in which topological contrast or voltage contrast is visible. Only information about the surface of the device is visible. Nonetheless, a contrast image of the surface of the device will in some cases reveal the location of a conductor, such as when the edges of a conductor are visible as topological contrast in an overlying layer of insulation which conforms to the conductor's shape.
When the location to be milled is identified, the FIB is positioned and directed to begin milling. In a FIB system such as the IDS 7000 FIBstation.TM. system (available commercially from Schlumberger Technologies, Inc., of San Jose, Calif.), the contrast image is displayed and software tools allow an operator to draw a FIB operation box on the image. The FIB operation box defines the boundaries of a region to be milled or otherwise processed.
IC devices having three or four metal layers are increasingly common, and devices with five or more metal layers are expected in the future. Power planes can cover large areas of the IC, especially with advanced, highly integrated logic devices such as microprocessors. Underlying layers of such "planarized" devices are hidden, making buried conductors difficult to locate. In this situation, contrast images of the device offer little information useful in locating a specific buried conductor. Determining where to mill is difficult at best, as the operator cannot accurately position a FIB operation box relative to device features which are not visible in the displayed image. Using those features which are visible, and triangulating from them to locate an invisible feature, is tedious, inaccurate and error-prone.
The FIB column in a FIB system is positioned relative to the IC device by operating an X-Y stage. However, even precision mechanical stages cannot assure accurate enough positioning of the FIB relative to a typical device feature when translating the column from a fiducial mark or other known position. Current commercial systems having precision mechanical stages, even those with high-performance encoders such as interferometers, have residual beam-positioning errors of 0.5 .mu.m in the best case and more typically 1 .mu.m to 2 .mu.m. This limitation is due to such factors as bearing accuracy and stage rigidity (Abbe error); column, stage and vacuum chamber rigidity; thermal expansion; bearing and lead-screw wear; alignment errors; and beam drift following die-level alignment. A simple FIB operation to cut or contact a 0.5 .mu.m-wide, buried, invisible signal conductor requires that the FIB operation definition box be positioned with an accuracy of 0.1 .mu.m or better, preferably 0.05 .mu.m. A positioning error of 0.5 .mu.m can easily cause a FIB milling operation to miss a buried conductor entirely.
Prior-art techniques are known for locating invisible conductors using computer-aided design (CAD) data. A mask layout overlay prepared from the CAD data is superposed on a contrast image of the device. The overlay is registered with the contrast image so that features of the device visible in the contrast image are aligned with corresponding features of the layout overlay. The location of a feature (such as a conductor) not visible in the contrast image relative to features visible in the contrast image is determined from the CAD data. FIB operation boxes can then be accurately positioned relative to the hidden feature. Such a technique can be carried out, e.g., with Schlumberger's IDS 7000 FIBstation.TM. system, as shown in the example of FIGS. 1A-1B.
FIG. 1A shows a contrast image display 100 of a portion of a device, in which conductors 102, 104, 106, 108 and 110 are visible as shaded areas. FIG. 1B shows a layout image display 150 in which conductors 160, 162, 164, 166 and 168 of a top metal layer, conductors 170, 172, 173, 174, 176 and 178 of an intermediate metal layer below the top metal layer, and conductor 180 of a bottom metal layer below the intermediate metal layer are shown in contrasting shading (preferably contrasting colors in the IDS 7000 FIBstation.TM. system). In the display of FIG. 1B, portions of the conductors of the intermediate metal layer are hidden where they pass beneath the conductors of the top metal layer. A graphic display of outlines of the conductors of FIG. 1B is prepared and superposed on the contrast image graphic display as shown in FIG. 1A. The outlines superposed on the display of FIG. 1A include the portions of the conductors which are hidden in the display of FIG. 1B. That is, lines 120, 122, 124, 126 and 128 correspond respectively to the outlines of top-metal conductors 160, 162, 164, 166 and 168; conductors 130, 132, 133, 134, 136 and 138 correspond respectively to the outlines of conductors 170, 172, 173, 174, 176 and 178; and lines 140 correspond to the outline of conductor 180.
When the superposed graphic display is aligned with visible conductors of the contrast image display as shown in FIG. 1A, the location of hidden conductors 172 and 178 is evident from layout lines 132 and 138. Examination of layout image display 150 shows that conductors 172 and 178 can be exposed by milling at regions defined by FIB operation boxes 190 and 192. FIB operation boxes 190 and 192 are marked on the image by the operator, along with a FIB operation box 194 which defines a region where FIB deposition of metal is to be performed to interconnect conductors 172 and 178. Overlay techniques are also described, for example, in U.S. Pat. No. 4,683,378 to Shimase et al.
Overlay techniques can work well if the contrast image contains enough unique topographic information to accurately register the mask layout overlay using device features visible in a localized field of view. However, as power planes get larger, contrast images contain less surface topography useful for overlay positioning. Surface topography of an advanced IC in the vicinity of an intended FIB operation is often insufficient to register the overlay with the required accuracy.
For example, the minimum contrast-image pixel size which will allow positioning of a FIB operation box with 0.1 .mu.m resolution is 0.1 .mu.m. In this context, the term "pixel" means a discrete element of the acquired data set describing a contrast image, which may or may not correspond to a discrete element of a display screen on which the contrast image is displayed. The "pixel size " refers to spacing of discrete elements of the acquired data set relative to dimensions of the device being imaged. A minimum pixel size of 0.01 .mu.m is preferable, allowing a FIB operation box to be positioned within 10 pixels and assuring a worst-case alignment error of .ltoreq.0.1 .mu.m.
FIGS. 2A and 2B show an example of how registration accuracy is limited by the pixel resolution and the field of view (FOV) of the contrast image. FIG. 2A shows an image portion 200 comprising a 5 .mu.m.times.5 .mu.m FOV with a pixel size of 0.01 .mu.m. Image portion 200 includes a 0.5 .mu.m-wide conductor 205 on which a FIB operation box 210 is to be placed. In the expanded view of FIG. 2B, conductor 205 is seen to be 50 pixels wide, so a maximum acceptable positioning error of 0.1 .mu.m is equivalent to 10 pixels.
A contrast image of up to 1000.times.1000 pixels is typical for today's commercial FIB systems. Greater resolution is not particularly desirable because of the long time needed to acquire an updated image and the limited availability of higher-resolution displays. For example, a single image having a 1 mm.times.1 mm field of view (FOV) with 0.01 .mu.m pixel resolution requires 10 Gigabytes of storage for 256 gray levels per pixel. That is 10,000 times the data in a single 1000.times.1000 pixel image of comparable resolution and would take 10,000 times as long to acquire. Acquiring a high-resolution, 1000.times.1000 pixel image at low beam current (5 pA to 50 pA for high spatial resolution) takes from 10 seconds to 60+ seconds, so acquiring a single 10 Gigabyte image would take hours or even days!
For an image size limited to 1000 times the pixel resolution and a pixel size of 0.01 .mu.m to 0.1 .mu.m, the FOV of the image ranges from 10 .mu.m.times.10 .mu.m to 100 .mu.m.times.100 .mu.m. If the nearest surface topography visible in the image is several hundreds of microns away from an area where a FIB operation box is to be placed, alignment accuracy of 0.1 .mu.m cannot be achieved--the FOV would have to be zoomed to a pixel resolution larger than the required positioning accuracy in order to view the surface topography and the operation box placement area.
Similar to the problem of hidden conductors is the aliasing problem which exists with regular repeating structures of devices such as random-access memories (DRAMs and SRAMs), where accurate identification of an individual cell can only be achieved by counting from the edge of an array. For example, FIG. 3A shows a DRAM chip 300 having blocks of regular, repetitive RAM cells. FIG. 3B shows a simplified, expanded view of a portion 320 of chip 300 within area 310 having repetitive cells 330-346. If the stage of a FIB system is moved in the X-direction to center the FIB column on a selected cell 342, that cell cannot be uniquely identified if the stage error a is greater than or equal to one-half the repetition period p of the DRAM cells. Thus, for a 1 .mu.m-square DRAM cell, a stage accuracy of better than 0.5 .mu.m (preferably better than 0.25 .mu.m) is needed to position the FIB column at that cell. With ever-shrinking device geometries, improved techniques are needed to accurately locate selected device features.